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Q3-2025 Earnings Call
AI Summary
Earnings Call on Jan 29, 2025
Record Results: Advantest posted all-time high sales, operating income, and net income for Q3 FY2024, driven by strong tester demand for AI-related semiconductors.
Upward Guidance: The company raised its full-year FY2024 forecasts for sales, operating income, and net income, citing robust demand and improved supply capabilities.
AI Demand: Demand for testers used in AI and high-performance SoCs continues to be the main growth driver, with expectations for this trend to persist into 2025.
Market Share: Management said they are tracking at or above their 58% market share target and expect potential upside in 2025 with new customer additions.
Supply Chain Strength: Enhanced procurement and supply chain management allowed Advantest to meet unforecasted demand and contributed to forecast upgrades.
Product Mix Impact: Gross margin dipped sequentially due to product mix and inventory valuation losses on non-AI testers, though full-year gross margin is expected to improve slightly.
Shareholder Returns: The share repurchase program was completed and the annual dividend was hiked to JPY 39 per share.
The call emphasized that strong demand for AI-related and high-performance computing (HPC) semiconductors is the main driver behind the company's record-breaking results. Demand for testers in these segments remains robust and is expected to continue into 2025, while demand for other segments such as automotive and industrial remains soft.
Advantest credited its ability to meet strong customer demand to timely procurement and enhanced supply capabilities, achieved through long-term agreements and diversified sourcing of core parts. This allowed the company to address unforecasted demand and improve its sales outlook for the year.
Although operating margin remained above 30% for the second consecutive quarter, the gross margin decreased sequentially due to a shift in product mix and inventory valuation losses on testers for non-AI applications. However, the full-year gross margin is projected to improve slightly over previous forecasts.
Management stated that their market share is tracking at or above the 58% target from their midterm plan for 2024 and expects further growth in 2025, particularly with new AI and HPC customers. They acknowledged increased competition but remain confident in their competitive position and customer traction.
The company completed its announced share repurchase program, acquiring about 5.71 million shares for JPY 50 billion. The annual dividend forecast was raised to JPY 39 per share, up JPY 4.75 year-over-year, reflecting management’s focus on balancing growth, investment, and capital returns.
Advantest announced strategic partnerships with Technoprobe and FormFactor to address increasing test complexity, especially for HPC semiconductors. These collaborations aim to deliver integrated solutions and strengthen Advantest’s position in wafer and die-level testing.
While the outlook for AI and HPC tester demand remains strong, management pointed to ongoing uncertainties, particularly geopolitical risks and the unpredictable nature of next-generation device complexity. They are monitoring these factors while expecting AI-related demand to drive growth going forward.
SoC tester sales remained high quarter-over-quarter, while memory tester sales saw a notable sequential increase, especially for DRAM and HBM. Mechatronics and service/support sales were steady, with expectations of continued growth in device interface and nanotechnology products.
[Interpreted] Thank you very much for joining Advantest Corporation's financial briefing for the third quarter of fiscal 2024 despite your busy schedule. I'd like to introduce the attendees on our site today: Mr. Douglas Lefever, Representative Director, Senior Executive Officer and Group CEO; Mr. Tsukui, Representative Director, Senior Executive Officer, President and Group COO; Mr. Mihashi, Senior Executive Officer, CFO, CSO, Executive Vice President of Corporate Strategy Group; and Mr. Nakahara, Senior Executive Officer, CCRO and Executive Vice President of Sales Group. Serving as a moderator for today's session, I am Oike of IR Department, Corporate Strategy Group.
In this financial briefing, Mr. Lefever will first report the summary of today's presentation. After that, Mr. Mihashi will report financial results for the third quarter of fiscal 2024. And then Mr. Lefever will present fiscal 2024 outlook before entertaining questions from the audience. We will close this session at 5:30 Japan time.
In today's financial briefing, we will use English/Japanese simultaneous interpretation. [Operator Instructions] Today's presentation materials are posted on TDNet and our website. The audience joining us through a telephone line is kindly requested to download the materials. During today's briefing, we will project Japanese version of the materials on the screen. The audience who prefer to see the English version is kindly requested to download English materials.
Before we begin, I'd like to remind you that today's briefing contains forward-looking statements, all of which are subject to risks and uncertainties that may cause our actual results to be different from those in such forward-looking statements. So firstly, Mr. Lefever will present a brief summary, including outline of third quarter of fiscal 2024.
Hello to everyone. I'm happy to welcome you all to our call. Let me start by providing an overview of today's presentation. Our FY 2024 third quarter sales, operating income and net income all posted record highs on a quarterly basis. As of late, we have seen further growth in tester demand for AI-related high-performance semiconductors, especially for SoC. Given that we are able to meet this strong tester demand, we have revised our full year earnings forecast for FY '24 upwards. I will give the details of this later in the presentation.
As we look into calendar 2025, while the second half is unclear as usual, we expect tester demand to remain strong. Tester demand for markets other than AI-related semiconductors is still taking time to recover, but strong demand for the AI-related semiconductors is expected to continue against the backdrop of increasing semiconductor complexity and production volume. I will also give some further details of this later in the presentation.
Now Mihashi-san will explain our third quarter results. Yes, please.
[Interpreted] So this is Mihashi, I'd like to talk about the results of the third quarter of fiscal 2024. So please refer to Page 5, please. This is the third quarter summary of results. I will now explain the results of the third quarter of fiscal 2024. The third quarter, we achieved record-breaking sales and profit. As Doug stated earlier, operating margin exceeded 30% for 2 consecutive quarters as shown on the slide. Details of the results will be explained in the following pages. On Page 6, this shows the summary of results of semiconductor component test systems.
First of all, SoC tester sales were JPY 113.0 billion, sustaining a high level of sales as in the second quarter. Robust tester demand from HPC AI related applications mainly drove the sales with some contribution coming from Edge AI related demand. Sales for mature process products, such as those for automotive and industrial equipment remained soft. Memory tester sales were JPY 54.6 billion, an increase of JPY 18.7 billion quarter-over-quarter. Sales for DRAM wafer test, particularly for HBM have increased as well as for DRAM final test.
Next, Mechatronics Systems. Sales of device interface increased quarter-over-quarter in tandem with increased sales of tester. As for services, sales of service, support and system-level test business remained nearly flat quarter-over-quarter.
Could you go to Page 7, please? This shows sales by region. For Taiwan, due to strengthened quality assurance requirement for high-end SoC semiconductors from several U.S. fabless companies, sales to related foundries and OSATs increased further in the third quarter. For South Korea and China, memory tester sales increased sequentially for DRAM.
Could you turn to the Page 8, please? The third quarter sales gross profit and operating income. Due to a high level of sales bookings, the operating margin exceeded 30% as in the previous quarter as I said earlier. On the other hand, gross profit margin decreased quarter-over-quarter. This is mainly due to changes in the product mix and the recording of inventory valuation losses on testers for non-AI applications where demand is soft. SG&A, including all other income and expenses was JPY 49.7 billion, mainly due to an increase in expenses associated with increased sales.
Next page. Here, you can see cash flow and the R&D. R&D expenses, CapEx and G&A are illustrated on this slide. CapEx increased compared to the second quarter. This was mainly due to investment related to the execution of operational excellence initiative as outlined in our third midterm management plan. On the right, you can see cash flow. Operating cash flow and free cash flow increased, reflecting a high level of sales and profits.
Next page, please. This shows the balance sheet. As of the end of December 31, inventories decreased quarter-over-quarter due to progress in our product shipment. We will continue to work on inventory management considering the uncertain business environment in light of geopolitical risks and other factors. As announced today, the share repurchase program has been completed. The total number of shares acquired was about 5.71 million shares for a total cost of about JPY 50.0 billion, we have achieved the target announced in October. We will continue to work on balance sheet management while optimally balancing growth, investment and capital efficiency. This concludes my presentation.
Now I'd like to hand over to Doug, who will go over fiscal 2024 outlook. Doug-san, please.
Okay. Thank you, Yas. Okay. Let me start by first explaining our business environment. The semiconductor market in 2025 is expected to continue to be driven mainly by AI-related demand as it was in 2024. Unit volumes continue to increase as more wafer and advanced packaging capacity is coming online. At the same time, device complexity is driving increased test content.
On the other hand, uncertainties about the future are continuing due to rising geopolitical risk, and we continue to monitor these carefully. Based on this business environment, I will now explain the outlook for the semiconductor tester market. We have revised up our market size estimates for calendar year 2024, primarily reflecting the expansion of our tester supply capabilities.
For 2025, we estimate the SoC tester market size now to be between USD 4.2 billion to USD 4.8 billion and memory testers to be in the range of USD 1.7 billion to USD 2.2 billion. While the recovery in tester demand for applications other than AI such as for automotive and industrial equipment is expected to take more time, robust demand is expected to continue for AI-related applications.
Now let me share the details of our FY 2024 forecast. We are revising our full year forecast upward as shown on this slide. We now estimate sales of JPY 740 billion, operating income of JPY 226 billion, income before tax of JPY 225 billion and net income of JPY 167.5 billion.
The upward revision of sales mainly reflects our timely procurement and enhanced supply capabilities, which were achieved through long-term agreements and diversification of the supply chain of our core parts. Our enhanced supply capabilities enable us to meet additional unforecasted demand alongside the ongoing strong demand for testers and AI-related applications, particularly for SoC in the fourth quarter. In addition, the yen depreciation has been a tailwind.
The gross profit margin for the full year is expected to be around 56%, slightly up from the previous forecast. In order to solve the challenges that our customers are facing in the increasingly complex semiconductor industry, we will continue our R&D and investment efforts to enhance the added value of testing, particularly targeting high-growth areas. These efforts include the development and evaluation of new test solutions.
The exchange rate assumptions for fourth quarter are JPY 140 to the U.S. dollar and JPY 155 to the euro. The latest forecast for the impact of exchange rate fluctuations on operating profit for FY '24 is an increase of JPY 1.3 billion for every JPY 1 of depreciation against the U.S. dollar and a decrease of JPY 300 million against the euro. Our year-end dividend forecast is JPY 20 per share. Combined with the interim dividend of JPY 19, our annual dividend forecast is now JPY 39 per share, which represents a dividend hike of JPY 4.75 year-over-year.
Next, I will explain the details of the sales forecast. First, let me discuss the Semiconductor & Component Test Systems segment. For full year FY '24, SoC tester sales forecast is JPY 408 billion. That's an upward revision of JPY 84 billion from the October forecast.
Our efforts to improve supply chain management in order to keep up with the delivery requirements of HPC and AI customers have enabled us to increase the pace of supply. As a result, we have revised up our sales forecast. Our memory tester sales forecast is now JPY 155 billion. That's an upward revision of JPY 9 billion from the October forecast. The improvement of our product supply capabilities has shown steady progress every quarter. By responding to customers' robust investment appetite for DRAM in a timely manner, we expect to achieve sales growth.
Now let me talk about our other business segments. First, for our Mechatronics Business, in FY '24, we have adjusted our sales forecast to JPY 68 billion. With tester sales growth, our device interface sales are expected to increase year-over-year. We also anticipate solid sales of our nanotechnology products. In FY '24, our service support and other sales forecast is now JPY 109 billion. For support services, firm demand is anticipated due to the steady growth of our installed base.
In our SLT business, sales are expected to be roughly flat year-over-year as smartphone demand remains soft. Meanwhile, we continue our efforts to expand our customer base in order to achieve mid- to long sales growth in this area. In the segment of HPC AI, the increasing complexity of semiconductors and high reliability requirements are driving new demand for SLT, burn-in and high-quality device interfaces.
In SLT, we have won several new customers and expect to see this begin to contribute in the second half of our fiscal year 2025. For our test board consumable business, we have now brought our Taiwan factory online and are ramping production for high-performance products.
Finally, I want to touch on a couple of strategic partnership agreements. We announced on January 9 that we have formed strategic partnerships with both Technoprobe and FormFactor. These partnerships involve both technology and manufacturing collaborations. Investments in and partnerships with 2 of the major probe card manufacturers ensure that customers have access to the best wafer test solutions. Increasing test complexity is becoming an industry challenge, especially for HPC-related semiconductors. As we have explained in our midterm management plan briefing in June last year, in order to solve this challenge, we intend to form an ecosystem to provide higher performance test solutions to our customers.
Therefore, we expect to continue expanding our partnerships and adding key partners into this ecosystem. Then one last thing. As for any potential impact on our business from the recent news related to DeepSeek or other AI models, it really is impossible for us to comment at this time. As of now, we have seen no indications from our customers of changes to their forecast.
Having said that, the AI-related market is exhibiting remarkable progress, and we continue to keep a close eye on this development. As a general rule, we feel progress of AI development, including that of different AI models has long-term positive implications on semiconductor demand and our test solutions.
This concludes my presentation. Thank you for your attention.
The first question comes from Yoshida-san, CLSA Securities.
My question, I'd like to ask about the market share. What market share do you expect for 2024 in both SoC tester and memory tester? And then do you anticipate these market shares changing into 2025? I've heard that your competitor has recently commented about the adoption of their testers by custom ASIC clients. So do you think the market is becoming more competitive?
Yes. We will be announcing in April about the final market share numbers for calendar year 2024. What I can say is that we are tracking at or above our midterm plan target, which was 58% or greater. So we are very confident that we're tracking to the plan for calendar year 2024. As for 2025, we do see some upside growth in our market share as well. And that will come from the addition of additional AI HPC customers, many of which are in that Mag 7 and associated custom ASIC partners. So I can't comment on what our competitor is saying, but that's the view from our company.
Just one follow-up question. Do you include the die-level test market for the 2025 market outlook?
I think the 2025 is a little premature to have any significance for the die-level handler market. We're seeing just initial evaluations going on in this year. And so for large quantity production level business, we would probably see that in the following year.
We'll take next question. Goldman Sachs, Nakamura-san.
[Interpreted] I'll ask a question in Japanese. On Page 12, this is CY '25 TAM. And there are bullet points saying that there is increasing uncertainty about the future. So what's the backdrop for this? Are there specifics you have in mind? And it seems that your '25 TAM estimate range is rather broad. What kind of scenarios do you have in mind for the minimum and the maximum numbers?
And in terms of visibility for the second half of '25, do you have improved visibility now?
[Interpreted] This is Nakahara speaking from sales. So with regards to your first question, it was about CY '25 in relation to increasing uncertainty in relation to geopolitical risks. So we have sales all over the world. And given the current situation, let's say, Sino-U.S. risks, these are all fast-changing matters, and so things are still uncertain.
So we have to keep a close eye on this. And then for 2025 TAM estimate, your question was about the range, right? So well, I would say like recently, the market is fairly dynamic. And from maybe the late 2025 for high-end logic, there'll be launches of next-generation devices and there would be a change in process node at the time. And on top of that, the memory that goes with it will be also next generation and there will be a higher stack count.
So it's similar to what we experienced in 2024. It's hard to say to what extent complexity is going to increase. It's really hard to predict. So in that sense, that the broad -- we came up with this range for TAM. Did I answer all your questions?
[Interpreted] Sorry, I was on mute. So finally, for SoC tester business for CY '25, like compared to 3 months ago, how has the second half '25 outlook changed, particularly for high-end SoCs?
[Interpreted] So I think compared to our last earnings call, I would say for SoC for CY '25, 3 months ago, midpoint was JPY 3.95 billion, but this time, our midpoint is JPY 4.5 billion. So as Doug talked about earlier, there will be an increase in device volume and also increasing complexity factor. So I would say, overall, the market is likely to increase. And in terms of half-on-half volume, I would say for the first half -- we have better visibility for the first half versus the second half. So for the second half, as I said earlier, given the upcoming launches of new devices, it's hard to say or hard for us to predict the extent of the complexity implications for us.
Next question comes from Morgan Stanley, [indiscernible].
[Interpreted] So I would say what's worrying is the momentum for this fiscal year, like given how strong this year is, maybe next year is going to face a high hurdle, and there will be a lot of news flows in the media about yield of advanced packages. And you've benefited from very strong demand this year given very low level yield. And so testers have benefited enormously. But it means that the hurdle for next year is going to be higher. You might have to suffer from a drop. What do you think Mak or Yas, Mihashi-san or Nakahara-san?
[Interpreted] This is Nakahara speaking. Well, so in terms of the high base we'll be facing next year in relation to strong benefit that you received from this year, the feedback that -- we've been speaking with customers and in terms of quality improvement and in terms of increments on package side, that's what we've heard from customers. But if we take this into account, current volume and also given the complexity of next-generation devices, CY '25 is likely to face an increase -- see an increase.
[Interpreted] And so additionally, I would say my follow-up question is that the recent surge in tester demand due to yield is still sustainable. Because of quality assurance, customers still have strong appetite. We'll continue to invest in testers. Is that correct?
[Interpreted] So in terms of existing generation devices, whether it's SoC or memory, there should be -- there is yield improvement, quality improvement that may result in test reduction. But at the same time, in 2025, as next-generation devices ramp up, there will be new challenges that will emerge that would have quality implications that may impact tester demand. So these are the scenarios that we have factored into.
I think I understand the question now, Wadaki-san. I think if you're asking about what's going to trigger the slowing of the growth that we're experiencing right now, we don't see it so much because there's many factors involved in these advanced package SoCs. For one thing, there's going to be continuation of Moore's Law. So there's going to be more transistors, which will lead to increased test times.
As far as chiplet goes, it's just beginning now. Sure, the advanced packaging has memory stacks and central processing and GPUs on it. But as those go into more of a chiplet environment, we expect to see more insertions happen at the wafer and the die level, which will have complexities. And then beyond that, there's even more things being added to the 3D package.
And silicon photonics is going to be something that comes new, which will add another layer of complexity. So we don't really see complexity slowing down at all. And the appetite for additional test is still quite high because of the expense of these packages and the ASPs of these devices. So sure, there's going to be certain times where there's not as much of increase as a prior generation, but there's going to be an increase. And what I'll say is that increase is coming on a larger fleet, a larger installed base.
So as we proliferate more test systems into the field, even small increases in test content are going to lead to large levels of capacity increases, assuming that the volumes stay the same or even increase. So hopefully, that helps to add a little additional color.
Next question, Hirakawa from BofA.
[Interpreted] So you said about launches of new generation devices. From supply chain, there are views or comments that are different from what's been said before. So based on these changes, was your earnings impacted for the fiscal year ending March '25? Should we forecast these changes?
I want to make sure I understand Hirakawa-san, the question. I think in fiscal '24, we're able to address some of the additional demand because we opened up our capacity through supply chain and production. And I believe you're asking if we will see that continue for 2025, if that will have an impact. And the answer is yes. We're always looking at our supply chain for component procurement and our ability to meet the customer demand.
Right now, we're stress testing our production to see the levels at which we can achieve even further growth, and we feel very comfortable right now with what we are doing in our supply chain. So we don't see any constraints to meeting our fiscal 2025 demand. So I'm hoping that -- sorry for the Japanese version.
Apologies for my indirect question. The direct question is, we hear that there's kind of a change in testing time in the supply chain. And my question was that -- did that give an impact to your revenues or not? And also, is it going to give some impact -- has it given the impact to your CY '25 SoC tester demand. That is actually my question.
It's not about our procurement and supply chain. It's about -- yes, I understand that. Yes, the answer is no. I think I understand what you're referring to. And we don't see any of that right now. So we continue to see test content increase. And so we're preparing ourselves for additional increases for next-generation devices.
Next, Tokai Tokyo Intelligence. Kamisaki-san, please go ahead.
[Interpreted] Well, with regards to the actual results for SoC testers and memory testers. So starting with SoC testers, it was flat Q-on-Q. For memory testers, Q-on-Q growth rate seem to have accelerated. In Q3, what kind of differences did you see between SoC versus memory customers?
[Interpreted] With regards to generative AI that's having -- giving us strong demand for both SoC and memory. And so here, you can see green colors that shows that memory tester shipment is growing a lot Q-on-Q.
So this is basically a reflection of delivery time line requirements from customers. Many of our customers are international customers. And so they do business on a calendar year basis. So in Q3, we saw a lot of requests concentrated. And so our shipment-wise, we did our best to try to meet their delivery deadlines.
[Interpreted] Well, demand-wise, you -- so you're saying that you didn't see a change in demand in Q3, right?
[Interpreted] Well, SoC is facing strong demand. But I wouldn't say there were outstanding very strong changes in Q3.
Next, Okasan Securities, Shimamoto-san, please go ahead.
[Interpreted] Well, my question is about the breakdown of SoC TAM estimate. If possible, I would like you to extract the AI part of TAM for CY '24 and '25. If it's difficult, then I think you have a breakdown usually between computing communications versus automotive, industrial, consumer DDIC. I think in FY '24, the split is 90 versus 10. For 2025, what kind of split do you expect for computing communications versus auto, industrial, consumer DDIC.
[Interpreted] Well, regarding TAM, it's difficult for us to extract just AI. So in terms of categorization, which is computing, communications versus automotive, industrial, consumer DDIC, I would say that maybe the split is approximately 70-30, so 70 is computing communication, just a ballpark figures. But in terms of our self split, it's different, but computing communication is by far the largest.
[Interpreted] As a follow-up question, you said 70-30 split. Was that '24? Is it likely to be similar for '25?
[Interpreted] Well, for '24, '25, I would say the split is more or less the same.
[Interpreted] So growth rate then would be similar for both, right?
[Interpreted] Yes. Well, so the split 70-30 split will not change, but then the denominator is different. So for -- there should be some difference between Computing Communications versus automotive, industrial, but that 70-30 split should remain valid.
[Interpreted] Like when you say it might be different, are you saying the Computing Communications will show a higher growth rate?
[Interpreted] Yes, that's correct because the denominator is larger.
Next, Macquarie Capital, Damian, please.
I'm going to ask this in English. Thanks very much Doug for the great set of results actually. Congratulations. I just wanted to follow up on the partnership with Technoprobe and FormFactor. Could you contextualize maybe it's a bit early for next year, but for '26 and '27, would you see the push into SoC test at die or wafer being additive to the tester market? Or would you see efficiency gains as actually being in some senses, leading to efficiency gains that will reduce the size of the market? Could you perhaps talk a little bit about the implications of the deal and how you feel about the long-term growth trajectory?
Yes. Sure. Damian. Thank you for the nice comments for our results. Yes, certainly, for the next couple of years, we see definitely a shift left as much testing that can be done at the wafer or die level is going to help with the end product yields.
As to more efficiency in those wafer sort operations, actually, we see more insertions across the wafer sort area. And the reason for that is because there's just more sophistication, more complexity. At the die level, for example, you need -- in order to have a real KGD, you need to have very, very good thermal solutions in order to do accurate die-level testing.
And so that involves a lot more complexity in the handling and the testing operation as well as the associated probe cards that go into those insertions. So the reason that we developed these partnerships -- and by the way, we had very, very deep relationships with both these companies as well as other probe card companies in the industry. But the reason that we made these partnerships at this point was because of the complexity situation of needing to have close technical collaborations because it's no longer a tester and a probe card and a prober or a handler, they have to be looked at as a total solution as one test cell. And so the deep collaborations have to become even deeper.
And so we felt it was necessary now to develop these relationships with these companies to address those complexities. '26, '27 is hard to tell if there will be efficiency gains. But we do know that there's going to be more opportunities in the wafer sort area. That being said, the final test and the system-level tests are also increasing in their importance because that's the place where all of the dilets or chiplets become together and the test times get extended and that's where the final test and screening happens.
So those are also extremely important insertions. So hopefully, that gives some color to your question.
So my impression would be that you will consider essentially this will be accretive to the overall TAM opportunity. Would that be correct?
Well, it's not accretive or dilutive. It's really a partnership with these companies to make sure that we're offering our customers the full solution set, in this case, for wafer sort or die sort. And yes, our partnerships involve equity investments in some cases. And so we have skin in the game, so to speak, with these companies to make sure that we're partnering at all levels, at the executive level and at the technical levels.
Got it. If I may, just one additional follow-up, a short one. So obviously, this is, I would say, kind of a unique situation. I mean, that I'm just wondering how in these places Advantest in relation to your primary competitor, given that if you deliver this solution on time and to meet the customer needs, you would essentially be ahead of the competitor. I just can't see why a customer would have 2 solutions of this nature. It essentially be an industry standard of sorts. Would you think that's overstating the case?
Yes. I mean, I think we're doing this for the customer benefit, which is to develop the right solutions at the right time for our customers. And so right now, we're in a very good position with our testers. It's hard to express it as industry standard, but in some cases, we're driving towards that.
And so the mission for us is to make sure that we drive integration on behalf of our customers, and that would extend to the probe cards, but also extends to other parts of the ecosystem that go into our test solutions. So we expect to do more of these kind of things in order to accurately partner for our customers' benefit.
We'll take the next call from Yoshioka-san, Nomura Securities.
[Interpreted] This is Yoshioka speaking from Nomura. My question will be about Edge AI devices. In the initial presentation, you said Edge AI devices contributed to third quarter SoC tester business. So my question is that for 2024, to what extent did you see benefit from Edge AI. Previously, AI Accelerator was the main driver for longer test time, but with Edge AI, it's also pushing test time longer as well? And how is that taking place?
Finally, for 2025, you presented the SoC TAM outlook? Does that -- like how much have you factored in contribution from Edge AI?
I would say, right now, primarily, we're still -- our business is still being driven largely by data center AI. And that's the customers, you can imagine. As far as Edge, we have seen some good news in Edge compute when it comes to some of the consumer electronics in the handsets.
A lot of the handsets now are equipped with a lot of AI compute capabilities. And so that is leading to some business upside. But it's clear that most of our business is going into more infrastructure level AI. Moving forward, we do expect there to be some additional business in FY '25 that is related to the Edge, but I do believe, by and large, in '25, the lion's share of our business will be driven still by AI data center business.
I think also it's important to mention that the definition of Edge AI, originally, everyone was thinking, a, it's going to be in PC, tablet, phones and more of the consumer applications. And I think what we're seeing now is that AI at the Edge will really extend into kind of industrial applications.
And so there's a lot of work being done, like, for example, in the area of robotics, people are talking about millions, if not billions, of robots having edge compute. So our definition of Edge compute really needs to evolve not just into the consumer space like handsets, but into other things. And ultimately, there will be the potential for the full humanoid and autonomous vehicle level of Edge compute.
But the edge compute definition is definitely now evolving, which will be good for the volume of AI-based semiconductors.
How about test time for Edge AI semiconductor get longer [indiscernible].
It will be longer than what historically has been at the Edge. So if you looked at an AP in a handset, certainly, the test times are going to be extended because those devices are becoming more complicated and have to run different kinds of workloads. And so there will be extension. Now I don't believe that the test times are going to be anywhere equivalent to what we're seeing on the data center side.
And that is a function of how complex the devices are as well as the economics behind the Edge versus infrastructure business.
Well, we are close to the end of hour. So we'll just take last question, UBS Securities, Yasui-san. Please go ahead.
[Interpreted] This is Yasui speaking from UBS. I have one question for 2025, for SoC tester demand driver. Would it be [indiscernible] GPU or custom Edge, which will be a bigger driver for FY '25 from Advantest perspective? And also from TAM perspective, would it be ASIC versus other devices?
This one is sensitive. So it's really -- so Yasui, it's very difficult for us to disclose. What I mentioned before is that we work with all of the, what we call the, Mag 7 companies who are developing their own silicon and also the partners that they have in the custom ASIC.
So it's difficult to say, depending on the application that they're working and co-working. So I apologize, but we could not elaborate further on that business segment.
Can you elaborate a little bit more on the custom ASIC side only, I think. You don't need to explain each specific customers, but a ballpark number, '25, '26. I mean, like I think last year, Advantest mentioned like you have involved in the many major projects. And like do you have better outlook, better than last year?
Yes, we're very bullish and positive in this custom ASIC business. And as far as trying to quantify the TAM size, probably the easiest way is to point you to some of the public statements about the TAM of those customers and what they see for their business and then apply some test intensity to that. Those test intensities will be probably higher than the average test intensity.
And so you can do some math based upon some of the recent reports on the TAM size for those custom ASIC companies?
And then one last follow-up question. Regarding the market share within custom ASIC, do you assume you gained market share or flattish or down this year?
We assume we will gain.
Thank you, Yasui-san. We will conclude the third quarter briefing. Thank you for your participation. [ Portions of this transcript that are marked [Interpreted] were spoken by an interpreter present on the live call ].